buffer store
英 [ˈbʌfə(r) stɔː(r)]
美 [ˈbʌfər stɔːr]
网络 缓冲积蓄器
英英释义
noun
- (computer science) a part of RAM used for temporary storage of data that is waiting to be sent to a device
双语例句
- After the transfer, you use the data in that structure to copy the string itself into your buffer in the local store using another DMA transfer, and wait for it to complete.
传输之后，使用那个结构中的数据来将字符串自身复制到本地存储的缓存区内，方法是借助另一个DMA传输并等待它完成。 - Log Buffer& Memory used to store all changes to database before it is flushed to the logs on disk.
日志缓冲区&在将所有对数据库的更改刷新到磁盘上的日志之前，用来存储这些更改的内存。 - In order to make better use of buffer resource and alleviate the pressure on the buffer of the core nodes, this strategy uses distributed storage mechanism to store the packets in the non-core code. 3.
采用分布式报文存储，使得报文能合理地存储在区域内非核心节点的缓存中，更好地利用了网络中的缓存资源，缓解核心节点的缓存压力。 - Buffer cell store commands, responds and data.
缓冲单元用于指令，响应以及数据的缓冲。 - A buffer overflow, or buffer overrun, occurs when a process attempts to store data beyond the boundaries of a fixed-length buffer.
当进程尝试将数据储存到固定长度的缓冲区的范围之外时，就会出现缓冲区溢出。 - The WinSock and DirectShow technologies are used in the main-machine PC to receive, decode and play the real-time multimedia data in the Ethernet. A double buffer queue like cycle queue technology is also used to store the multimedia data in the memory of the main-machine.
上位机PC主要利用WinSock技术和DirectShow技术进行网络多媒体数据的实时接收、解码和播放等工作，并使用了一种类似循环队列的双缓冲队列技术来进行内存中多媒体数据的缓冲工作。 - The version buffer is not large enough to store the version string.
版本缓冲区的大小不足以存储版本字符串。 - Since simulating chip multi-processor needs vast FPGA resource, we use software memory buffer technique to store data in the host computer, reduce the occupation of FPGA resource.
片上多处理器的模拟需要大量的FPGA资源，我们使用软件实现的存储缓存机制可以将数据缓存到宿主机器上，有效调节FPGA资源。 - When MySQL must perform a sort, it allocates a sort buffer to store the rows as they're read from disk.
当MySQL必须要进行排序时，就会在从磁盘上读取数据时分配一个排序缓冲区来存放这些数据行。 - In hardware design, a properly sized buffer cache is arranged to store the temporary data used in deblocking, and dual parallel bus architecture is used to satisfy the requirement of the high data bandwidth.
在硬件设计中，采用cache缓存法暂存用于去块效应的临时数据，同时采用双并行总线满足较高的系统带宽要求。